ADC resolution, ADC offset error and Gain error
Maximizing the ADC performance Part 1
The life of a design engineer is filled with failure during testing and then the last minute rework and meet deadlines. Any engineer dealing with data converters (ADCs and DACs) will at some point find out that the part does not meet specs as stated in the datasheet. So, are these guys lying about their part? TheADC resolution, ADC offset error and Gain error have a huge impact on the performance of the ADC. We will look at the specifications of ADCs, the errors that come with ADCs. In later posts we will demonstrate how to reduce these errors and how to get more resolution out of the ADC than what the manufacturer specifies. Yes it’s true, we can get 12 bit from a mere 10 bit ADC. This post is intended for enthusiast that like to squeeze performance out of their components. For introductory stuff use the best tool available “Google”. Most of the mathematics has been avoided but it is important to understand the underlying theory to further leverage signal processing for whatever you are pursuing.
The ADC resolution is the number of bits that the ADC can resolve. With a 10 bit ADC we can get 1024 increments between the reference voltage and ground using single ended configuration. When we test a 10 bit ADC we immediately recognize that we don’t get the full 10 bit resolution using conventional methods. So let’s take a closer look at the error sources and simple ways of mitigating those error. To simplify things we can look at an ideal 10 bit ADC with 1024 increments between the reference voltage and ground. The least significant bit (LSB) in a 10 bit ADC with a reference of 5 volt is represents . That is for every additional 48 mV, the ADC will increment up until 1024 which represents the voltage at the reference. Notice that the ADC will output 4 which is (00000100 in binary) when presented with 194 mV +- 24 mV at the input. So far the error which is called quantization error is 1 LSB. Later we will see how some technique in signal processing can be used to remove this error.
ADC offset error
The offset of an ADC is when zero volt is presented to it and the output is some non zero value. The offset has to be measured at the center of the transition from one output to the next as indicated by the red or blue dot. The offset value is added to all the values that are converted. Offset can be trimmed out or corrected in code as we will show later.
The gain error is the difference in slope from the perfect ADC to real ADC. The problem is that different manufacturers specify their gain error differently. Most manufacturers specify the gain error using the last step in the ADC. The number of bits away from the ideal slope is considered the gain error.
Freescale application note AN2438/D 2/2003
This application note will help users of analog-to-digital converters (ADC) understand common terminologies used in the electronics industry to define ADC operation and performance.
Texas Instrument application note SLAA013
This application report discusses the way the specifications for a data converter are defined on a manufacturers data sheet and considers some of the aspects of designing with data conversion products.
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